1. Field of the Invention
This invention relates to an exposure, and more particularly, to an exposure that performs an off-axis alignment synchronized with an exposing process.
2. Description of Related Art
The formation of a semiconductor device consists of various processes including deposition, exposing, etching and so on. Since most materials forming a semiconductor device need to be patterned in order to meet certain required layouts, the exposing process directly affects the quality and efficiency of the fabrication process of a semiconductor device. Before performing an exposing process, it is essential to align a wafer to ensure that a pattern is transferred on to desired location precisely. Generally, at least two alignment marks are formed on a wafer for the purpose of aligning the wafer.
The alignment and exposing process performed on a conventional exposure is shown in FIGS. 1A and 1B, wherein the conventional exposure basically contains a wafer stage 102 and a alignment beam scan unit 106. Referring to FIG. 1A, a wafer 101 is placed on a holding pad 104 of an adjustable wafer stage 102. There are two alignment marks (not shown in figure) formed on the wafer 101 for locating the wafer in two different directions respectively. Before performing an exposing process, the alignment beam scan unit 106, which is fixed still, emits two alignment beams 103 to strike on a mirror set 108, and then the alignment beams 103 are reflected on the wafer 101 in two different directions. By moving the wafer stage 102 in a certain path, the alignment beams 103 scan over different areas on the wafer 101 till the alignment marks on the wafer are found. By using an interferometer in the alignment bean scan unit 106 to check the alignment beams reflected back from the surface of the wafer 101, the position of the wafer 101 is correctly defined. Referring next to FIG. 1B, the wafer stage 102 moves to an exposing position, so that the aligned wafer 101 thereon is right under an exposing unit 100 of the exposure and is ready to be patterned.
Since a conventional exposure as described above can only support one wafer, that is, it is limited to perform either the exposing process or the alignment process at one time. Therefore, the conventional exposure is not efficient because either the exposing unit 100 or the alignment beam scan unit 106 is idle whenever the other unit is functioning. In addition, the time spent on loading and unloading a wafer also increases the process time of fabricating a semiconductor device.